DocumentCode :
3278866
Title :
Design considerations for CMOS low-noise amplifiers
Author :
Allstot, David J. ; Li, Xiaoyong ; Shekhar, Sudip
Author_Institution :
Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA
fYear :
2004
fDate :
6-8 June 2004
Firstpage :
97
Lastpage :
100
Abstract :
A low-noise amplifier is the first active stage of a CMOS RF receiver. The inductively degenerated common-source LNA (CS-LNA) topology is currently popular because it achieves high gain, low noise figure, etc. The amplifier´s performance is reviewed and the optimum Q value that gives the minimum noise figure is derived. It is then compared to the conventional common-gate LNA (CG-LNA) in terms of gain, noise figure, input matching, reverse isolation and stability. Finally, a general gm-boosted design technique for common-gate RF circuits is introduced that provides lower noise figure and power consumption than the conventional CS-LNA and CG-LNA stages; it also preserves the CG-LNA insensitivity to parasitic input capacitances. In view of CMOS scaling, the CG-LNA topology is attractive for future higher frequency and/or lower power designs.
Keywords :
CMOS analogue integrated circuits; capacitance; circuit stability; integrated circuit design; power consumption; radio receivers; radiofrequency amplifiers; system-on-chip; CMOS RF receiver; CMOS low-noise amplifiers; Q value; common-gate LNA; common-gate RF circuits; common-source LNA; input matching; minimum noise figure; parasitic input capacitance; power consumption; reverse isolation; stability; system-on-chip; Circuit noise; Circuit topology; Impedance matching; Low-noise amplifiers; Network topology; Noise figure; Power dissipation; Radio frequency; Radiofrequency integrated circuits; Resonance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE
ISSN :
1529-2517
Print_ISBN :
0-7803-8333-8
Type :
conf
DOI :
10.1109/RFIC.2004.1320538
Filename :
1320538
Link To Document :
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