A compact design of n-bit ripple carry adder circuit using QCA architecture

Author

Sultana, Tania ; Bardhan, Rajon ; Bithee, Tangina Firoz ; Tabassum, Zinia ; Lisa, Nusrat Jahan

Author_Institution

Dept. of Comput. Sci. & Eng., Ahsanullah Univ. of Sci. & Technol., Dhaka, Bangladesh

fYear

2015

fDate

June 28 2015-July 1 2015

Firstpage

155

Lastpage

160

Abstract

In this paper, we propose a new 3-dot based QCA architecture. We also present wiring logics, basic gates and XOR gate using proposed QCA 3-dot cell. All these components are very much efficient to compute basic operations. Moreover, we design a QCA 3-dot based half adder and extend the half adder into a full adder which has least number of QCA cells till now. We also design a powerful and efficient n-bit ripple carry adder applying our new and novel scheme. Our proposed circuits perform much better than the existing ones, e.g., the proposed 32-bit ripple carry adder circuit improves 21% on QCA cell, 99% on area than the existing best known one.

Keywords

adders; logic gates; network synthesis; 3-dot based QCA architecture; QCA 3-dot based half adder; QCA 3-dot cell; XOR gate; basic gates; compact design; full adder; n-bit ripple carry adder circuit; wiring logics; Adders; Computer architecture; DH-HEMTs; Logic gates; Microprocessors; Wires; 3-Dot; Full Adder; Half Adder; QCA; Wiring Logic; n-Bit Ripple Carry Adder;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer and Information Science (ICIS), 2015 IEEE/ACIS 14th International Conference on

Conference_Location

Las Vegas, NV

Type

conf

DOI

10.1109/ICIS.2015.7166586

Filename

7166586