Investigations on partially filled HAR tsvs for MEMS applications

Author

Hofmann, Lutz ; Schubert, I. ; Gottfried, Knut ; Schulz, Stefan E. ; Gessner, T.

Author_Institution

Fraunhofer Inst. for Electron. Nano Syst., Chemnitz, Germany

fYear

2013

fDate

13-15 June 2013

Firstpage

1

Lastpage

3

Abstract

For considerations of stress reduction HAR-TSVs were only partially filled with copper. A comparison was made to ring shaped TSVs (i.e. copper ring with silicon core). Two approaches regarding the way of TSV implementation (before and after wafer bonding/ thinning, resp.) are discussed, concerning process ability and yield aspects. Electrical measurement yield 11 MΩ for a single TSV and 76 MΩ for a 4-point TSV-chain (incl. RDL).

Keywords

copper; integrated circuit layout; integrated circuit measurement; integrated circuit testing; micromechanical devices; three-dimensional integrated circuits; wafer bonding; 4-point TSV-chain; Cu; MEMS application; RDL; copper ring; electrical measurement; high aspect ratio through silicon via; partially filled HAR TSV; resistance 11 mohm; resistance 76 mohm; ring shaped TSV; silicon core; stress reduction; thinning; wafer bonding; Copper; Etching; Metallization; Silicon; Stress; Through-silicon vias; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference (IITC), 2013 IEEE International

Conference_Location

Kyoto

Print_ISBN

978-1-4799-0438-9

Type

conf

DOI

10.1109/IITC.2013.6615585

Filename

6615585