DocumentCode :
3281717
Title :
Evaluation of utilizing 0.18-μm PMOS transistors in a 2.4-GHz receiver
Author :
Yu, Chikuang ; O, Kenneth K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
fYear :
2004
fDate :
6-8 June 2004
Firstpage :
555
Lastpage :
558
Abstract :
2.4-GHz PMOS low noise amplifiers (LNAs) fabricated in a 0.18-μm CMOS process have ∼16 dB transducer power gain and 3.5 dB noise figure (N.F.) at 5.4-mW power consumption, which is ∼3 dB lower and 1 dB higher than those of NMOS LNAs fabricated in the same process. PMOS LNAs have 6-8 dB higher IIP3. 2.4-GHz PMOS mixers have 6-dB conversion gain and ∼ 8-dB double side band N.F. at 29-mW power consumption, The gain is ∼ 3 dB lower while the N.F. is slightly lower than those of NMOS mixers. PMOS mixers have about 5-9 dB lower flicker noise. These indicate the feasibility of using PMOS transistors for RF applications, to improve noise isolation without adding any process modifications and cost.
Keywords :
1/f noise; MOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; UHF mixers; flicker noise; integrated circuit noise; radio receivers; 0.18 micron; 1/f noise; 16 dB; 2.4 GHz; 29 mW; 3.5 dB; 5.4 mW; 6 dB; 8 dB; CMOS process; NMOS LNA; PMOS mixers; PMOS transistors; UHF receiver; flicker noise; low noise amplifiers; noise isolation; substrate noise immunity; 1f noise; CMOS process; Energy consumption; Gain; High power amplifiers; Low-noise amplifiers; MOS devices; MOSFETs; Noise figure; Transducers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE
ISSN :
1529-2517
Print_ISBN :
0-7803-8333-8
Type :
conf
DOI :
10.1109/RFIC.2004.1320681
Filename :
1320681
Link To Document :
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