DocumentCode :
3289011
Title :
Package design optimization and materials selection for stack die BGA package
Author :
Kappor, R. ; Kuan, Lim Beng ; Hao, Liu
Author_Institution :
United Test & Assembly Center Ltd., Singapore
fYear :
2004
fDate :
July 14-16, 2004
Firstpage :
113
Lastpage :
118
Abstract :
Due to an expanding consumer electronics market and the need for form factor reduction, stack packages have been gaining popularity in the last 3 years. With the incorporation of silicon die stacking, there is a corresponding increase in biomaterial coupling and interfacial adhesion becomes a prime reliability under the exposure of both moisture and thermal excursion. With the requirement for higher solder reflow temperatures for lead-free applications, the problem becomes even more severe. It becomes increasingly important to understand the combined effects of material selection and package structure on the interfacial delamination under temperature excursion in the presence of moisture. This paper presents a detailed analysis into the effects of packaging materials and structure on interfacial delamination under temperature excursion in the presence of moisture for two die stack fine pitch BGA (D2-FBGA). Upfront analysis based on thermo-mechanical modelling is performed prior to a full design of experiments (DOE) investigation. The current DOE matrix includes variation in mold compound delamination and other test factors such as geometrical variations in die stacking and the selection of mold compound influence the intensity of delamination.
Keywords :
ball grid arrays; circuit optimisation; delamination; design of experiments; microassembling; optimised production technology; thermal management (packaging); DOE matrix; biomaterial coupling; delamination intensity; design of experiments; die stack fine pitch BGA; geometrical variations; interfacial adhesion; interfacial delamination; lead-free applications; materials selection; moisture; mold compound delamination; package design optimization; package structure; packaging materials; silicon die stacking; solder reflow temperatures; stack die BGA package; stack packages; test factors; thermal excursion; thermomechanical modelling; Biological materials; Consumer electronics; Delamination; Design optimization; Electronic packaging thermal management; Electronics packaging; Moisture; Stacking; Temperature; US Department of Energy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2004. IEEE/CPMT/SEMI 29th International
ISSN :
1089-8190
Print_ISBN :
0-7803-8582-9
Type :
conf
DOI :
10.1109/IEMT.2004.1321642
Filename :
1321642
Link To Document :
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