DocumentCode :
3289155
Title :
HLSIM-a new hierarchical logic simulator in APL
Author :
Zein, David A. ; Engel, Oliver P. ; Ditlow, Gary
fYear :
1992
fDate :
7-9 April 1992
Firstpage :
333
Lastpage :
338
Abstract :
HLSIM is an APL hierarchical logic simulator that can deal with nested models. The program has all the facilities to handle large VLSI circuits with complicated sequential logic, including full chip simulation. The authors discuss two major programs: an analog to digital netlist converter and a new digital simulator implemented in APL, a natural environment for logic simulators, especially when its powerful APL nested array facilities are used. The netlist converter takes a hierarchical analog netlist and supplementary files for the leaf models, and creates a digital model of the VLSI circuit. A discussion of the simulator includes its data structure, two algorithms for the static (zero) and the dynamic (unit or variable) delay modes of simulation. The authors also discuss how to handle unique features of the bipolar circuits including emitter, collector dots and differential pairs. Three types of gates can be used: primitive, truth tables, and behavioral models implemented as arbitrary user functions. The last feature enabled them to model and simulate complicated bipolar chips and decoders.<>
Keywords :
APL; VLSI; circuit analysis computing; digital simulation; integrated logic circuits; logic CAD; sequential circuits; APL nested array facilities; HLSIM; analog to digital netlist converter; behavioral models; bipolar chips; bipolar circuits; data structure; decoders; differential pairs; digital model; digital simulator; dynamic delay modes; hierarchical logic simulator; large VLSI circuits; leaf models; nested models; sequential logic; truth tables; Analog-digital conversion; Central Processing Unit; Circuit simulation; Decoding; Delay; Logic arrays; Logic gates; Logic programming; Sequential circuits; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-7803-0623-6
Type :
conf
DOI :
10.1109/VTEST.1992.232775
Filename :
232775
Link To Document :
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