Simultaneous sampling ADC data acquisition system for the QUIET experiment

We present the data acquisition system for Phase I of the Q/U Imaging ExperimenT (QUIET) that will operate arrays of 91 4-channel W-band (90 GHz) and 19 4-channel Q-band (40 GHz) receivers, both placed on 1.4 m and 7 m telescopes, in Chajnantor, Chile. The analog signals from the receivers, modulated at 4 kHz, are read out by up to 13 custom-made 6U VME modules implemented each with 32 18-bit, SAR ADCs. The sampling for all 364 (or 76) channels is simultaneous on one 800 kHz, low jitter clock for each array. Data are then processed locally with field programmable gate arrays (FPGAs) that perform signal demodulation and averaging over 10 ms, while blanking out the transition edges of the 4 kHz switching frequency, during which the receivers outputs are not well defined. The calculated values are continuously read out through the VME backplane to the crate controller and then passed, along with the absolute time stamp and telescope pointing information, to a remote PC for storage. One of the ADC modules in the system acts as "master", generating the sampling clock as well as the switching and data processing synchronization signals for the whole array. In the future, the DAQ will be upgraded to accommodate the requirements of Phase II of the QUIET experiment with arrays containing up to 1,000 receivers. The full design and multi-card test results will be described