Experimental study of carrier velocity overshoot in sub-0.1 /spl mu/m devices-physical limitation of MOS structures

Author

Mizuno, T. ; Ohba, R.

Author_Institution

Res. & Dev. Center, Toshiba Corp., Kawasaki, Japan

fYear

1996

fDate

8-11 Dec. 1996

Firstpage

109

Lastpage

112

Abstract

We have experimentally studied the carrier velocity overshoot in sub-0.1 /spl mu/m region for both SOI and bulk MOSFETs and the physical mechanism for the velocity degradation. At low transverse field and low carrier density conditions in SOI, it is possible to realize the carrier velocity overshoot in the sub-0.1 /spl mu/m region. However, it is very difficult in MOS structures to improve the carrier velocity at a high carrier density condition, because of both the phonon/surface roughness scattering and an anomalous scattering. This is the physical limitation of scaled MOS structures to realize higher current drivability.

Keywords

MOSFET; carrier density; silicon-on-insulator; 0.1 micron; MOS structure; SOI MOSFET; anomalous scattering; bulk MOSFET; carrier density; carrier velocity overshoot; current drivability; phonon scattering; surface roughness scattering; Capacitance; Degradation; Electrons; MOSFETs; Phonons; Research and development; Rough surfaces; Scattering; Surface roughness; Velocity measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1996. IEDM '96., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-3393-4

Type

conf

DOI

10.1109/IEDM.1996.553133

Filename

553133