DocumentCode
3293238
Title
Risk Based Capacity Planning Method for Semiconductor Fab with Queue Time Constraints
Author
Ono, Akira ; Kitamura, Shoichi ; Mori, Kazuyuki
Author_Institution
Renesas Technol. Corp., Itami
fYear
2006
fDate
25-27 Sept. 2006
Firstpage
49
Lastpage
52
Abstract
It is difficult to plan capacities of a semiconductor wafer fabrication with constraints of queue time which means a waiting time from the end of a step to the start of the next step for warranting production quality. If the queue time constraints could not be kept, the product is scrapped or reprocessed for qualitative recovery, and production efficiency remarkably decreases. This paper proposes an evaluation method which enables capacity planning of a fab with the queue time constraints, and shows its validity by simulation experiments. Furthermore we present an effectiveness of the method by applying to actual production lines.
Keywords
capacity planning (manufacturing); integrated circuit manufacture; quality management; scheduling; production efficiency; production lines; production quality; queue time constraints; risk based capacity planning method; semiconductor wafer fabrication; Capacity planning; Fabrication; Investments; Manufacturing; Production facilities; Risk management; Semiconductor device manufacture; Tellurium; Time factors; Upper bound;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2006. ISSM 2006. IEEE International Symposium on
Conference_Location
Tokyo
ISSN
1523-553X
Print_ISBN
978-4-9904138-0-4
Type
conf
DOI
10.1109/ISSM.2006.4493020
Filename
4493020
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