DocumentCode

3294489

Title

Low-power Testing For C-testable Iterative Logic Arrays

Author

Hwang, Shih-Am ; Wu, Cheng-Wen

fYear

1997

fDate

3-5 June 1997

Firstpage

355

Lastpage

358

Keywords

CMOS logic circuits; Circuit faults; Circuit testing; Costs; Energy consumption; Logic arrays; Logic testing; Polynomials; Power dissipation; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 1997. Proceedings of Technical Papers. 1997 International Symposium on

Conference_Location

Taipei, Taiwan

ISSN

1524-766X

Print_ISBN

0-7803-4131-7

Type

conf

DOI

10.1109/VTSA.1997.614934

Filename

614934