Threshold Voltage Asymmetry from Unintentional Angle of Implant on 90nm Floating Gate Flash Memory Devices

This work looks into one possible cause for wider V_T distributions arising from implanter issues. An unintentional convergence or divergence in the implanter beam direction leads to non-uniformities in the odd-row and even-row average V_TS across the wafer. A mechanism for this phenomenon is proposed and experimental evidence supporting it is presented. An improvement in the uniformity is shown on a newer generation implanter with better divergence control of the beam.