DocumentCode
3296572
Title
Combining switches for the NYU Ultracomputer
Author
Dickey, Susan R. ; Kenner, Richard
Author_Institution
New York Univ., NY, USA
fYear
1992
fDate
19-21 Oct 1992
Firstpage
521
Lastpage
523
Abstract
A pairwise combining switch has been implemented for use in the 16×16 processor/memory interconnection network of the NYU Ultracomputer prototype. The switch design may be extended for use in very large systems by providing greater combining capability. Methods for doing so are discussed
Keywords
multiprocessor interconnection networks; parallel processing; NYU Ultracomputer; pairwise combining switch; processor/memory interconnection network; Computer architecture; Computer networks; Delay; Flexible printed circuits; Logic; Packaging; Prototypes; Routing; Switches; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Frontiers of Massively Parallel Computation, 1992., Fourth Symposium on the
Conference_Location
McLean, VA
Print_ISBN
0-8186-2772-7
Type
conf
DOI
10.1109/FMPC.1992.234864
Filename
234864
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