Title :
A Passive Model-Order Reduction Algorithm for RLC Networks with Embedded Delay Elements
Author :
Chen, Changzhong ; Gad, Emad ; Tseng, Wenliang ; Nakhla, Michel ; Achar, Ram
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont.
Abstract :
This paper describes a new algorithm to obtain reduced-order models for large networks with delay elements. The proposed algorithm can be used in situations where delay extraction based modeling approaches have been used to model portions of interconnects with low losses, while other portions are modeled with large networks of lumped components. It is shown that the reduced-order model is passive by construction
Keywords :
RLC circuits; delays; passive networks; RLC networks; embedded delay elements; passive model-order reduction algorithm; reduced-order model; Computational complexity; Computational modeling; Construction industry; Delay; Frequency; Information technology; Integrated circuit interconnections; Packaging; RLC circuits; Reduced order systems;
Conference_Titel :
Signal Propagation on Interconnects, 2006. IEEE Workshop on
Conference_Location :
Berlin, Germany
Print_ISBN :
1-4244-0455-x
Electronic_ISBN :
1-4244-0455-x
DOI :
10.1109/SPI.2006.289201