A comparative analysis of logic styles for secure IC´s against DPA attacks

Author

Sundström, Timmy ; Alvandpour, Atila

Author_Institution

Dept. of Electr. Eng., Linkoping Univ., Sweden

fYear

2005

fDate

21-22 Nov. 2005

Firstpage

297

Lastpage

300

Abstract

This paper presents a comparative analysis of logic styles for secure IC´s against differential power analysis attacks. We have investigated the correlation between data and instantaneous power consumption in five logic styles including: static CMOS, single-ended domino, differential domino, charge recycling sense amplifier based logic, and dynamic current mode logic. Circuit simulations and statistical analysis show that dynamic current mode logic gives the lowest correlation between power consumption and data, while differential domino combined with a strict clocking scheme shows the best design complexity trade-off.

Keywords

cryptography; current-mode logic; logic design; statistical analysis; charge recycling sense amplifier logic; circuit simulations; clocking scheme; differential domino logic; differential power analysis attacks; dynamic current mode logic; logic styles; power consumption; secure integrated circuits; single-ended domino logic; static CMOS; statistical analysis; CMOS logic circuits; Circuit simulation; Clocks; Differential amplifiers; Energy consumption; Logic circuits; Logic design; Power amplifiers; Recycling; Statistical analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

NORCHIP Conference, 2005. 23rd

Print_ISBN

1-4244-0064-3

Type

conf

DOI

10.1109/NORCHP.2005.1597048

Filename

1597048