Title :
A 64-4096 point FFT/IFFT/Windowing Processor for Multi Standard ADSL/VDSL Applications
Author :
Baireddy, Vijayavardhan ; Khasnis, Himamshu ; Mundhada, Rajesh
Author_Institution :
Texas Instrum., Bangalore
fDate :
July 30 2007-Aug. 2 2007
Abstract :
A programmable 64-4096 point FFT/ IFFT/Windowing processor for DSL applications is discussed. Dynamic scaling, computation restructuring in terms of radix-2 butterfly and clustered computation power down methods are presented. The single multiplier based 360 MHz design occupies 0.38 sqmm of area in 90 nm process and consumes 19.8 mW of dynamic power for a 4096 point computation.
Keywords :
application specific integrated circuits; digital signal processing chips; digital subscriber lines; fast Fourier transforms; programmable circuits; 64-4096 point FFT-IFFT-windowing processor; ADSL; VDSL; application specific integrated circuits; clustered computation power down; computation restructuring; digital subscriber line; dynamic scaling; frequency 360 MHz; inverse fast Fourier transforms; power 19.8 mW; programmable circuit; radix-2 butterfly; size 90 nm; Application specific integrated circuits; CMOS technology; Computer architecture; Computer buffers; DSL; Hardware; Instruments; Programmable circuits; Read-write memory; Throughput; Application Specific Integrated Circuits (ASIC); Digital Subscriber line (xDSL); FFT; Programmable circuit;
Conference_Titel :
Signals, Systems and Electronics, 2007. ISSSE '07. International Symposium on
Conference_Location :
Montreal, Que.
Print_ISBN :
1-4244-1448-2
Electronic_ISBN :
1-4244-1449-0
DOI :
10.1109/ISSSE.2007.4294498
