• DocumentCode
    3310
  • Title

    Improved Trace Buffer Observation via Selective Data Capture Using 2-D Compaction for Post-Silicon Debug

  • Author

    Joon-Sung Yang ; Touba, Nur A.

  • Author_Institution
    Intel Corp., Austin, TX, USA
  • Volume
    21
  • Issue
    2
  • fYear
    2013
  • fDate
    Feb. 2013
  • Firstpage
    320
  • Lastpage
    328
  • Abstract
    This paper presents a novel technique for extending the capacity of trace buffers when capturing debug data during post-silicon debug. It exploits the fact that is it not necessary to capture error-free data in the trace buffer since that information can be obtained from simulation. A selective data capture method is proposed in this paper that only captures debug data during clock cycles in which errors are present. The proposed debug method requires only three debug sessions. The first session estimates a rough error rate, the second session identifies a set of suspect clock cycles where errors may be present, and the third session captures the suspect clock cycles in the trace buffer. The suspect clock cycles are determined through a 2-D compaction technique using multiple-input signature register signatures and cycling register signatures. Intersecting both signatures generates a small number of suspect clock cycles for which the trace buffer needs to capture. The effective observation window of the trace buffer can be expanded significantly, by up to orders of magnitude. Experimental results indicate very significant increases in the effective observation window for a trace buffer can be obtained.
  • Keywords
    buffer circuits; clocks; compaction; elemental semiconductors; integrated circuit testing; logic testing; silicon; 2-D compaction technique; cycling register signatures; debug data capture; debug method; effective observation window; error-free data; multiple-input signature register signatures; post-silicon debug; rough error rate; suspect clock cycles; trace buffer observation; trace buffers; Buffer storage; Clocks; Compaction; Debugging; Error analysis; Registers; Silicon; 2-D compaction; observation window; post-silicon debug; selective data capture; trace buffer;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2012.2183399
  • Filename
    6142141