Security camera system using sharply outlined display algorithm and variable-clock CVBS encoder

In this paper, we propose the security camera system that displays a sharp and clear image by using sharply outlined display algorithm and has less hardware complexity by using a modified composite video baseband signal generator of a variable-clock video encoder. The proposed system is fabricated with the test camera chip that has been manufactured by the MagnaChip 0.25 μm CMOS process.