Design of 2.1GHz RF CMOS Power Amplifier for 3G

In the radio frequency (RF) transceiver system, the integration of CMOS power amplifier (PA) remains to be a challenge. In this paper, a PA module is designed, which can be used for 3G mobile communications. A single-ended two-stage Class AB PA is adopted for its higher power efficiency and better linearity. The circuit is simulated by Cadence SpectreS in TSMC 0.25 mum CMOS process. As shown by the simulation results: at 2.1 GHz under 2.5 V, the output power is 1 W (30.1 dBm) while input power signal is 0 dBm, the power gains more than 20 dB of broadband within 1.1 GHz to 3 GHz, and the power added efficiency (PAE) is 51.98%. The layout of the related circuit is drawn by means of the Virtuoso Layout Editor with total size of 1227times1181 mum².