From system level to defect-oriented test: a case study

The purpose of this paper is to demonstrate the usefulness of a recently proposed Object-Oriented (OO) based methodology and tools (SysObj and Test-Adder) when applied in the design of testable hardware modules (eventually used as embedded cores in SOCs). A public domain processor (PIG) is the vehicle for such assessment. A boundary scan soft wrapper design is presented and architectural quality is evaluated by adequate metrics. A novel mixed-level, defect-oriented fault simulator, VeriDOS, is used to demonstrate the efficiency of applying a functional lest (stored in the ROM) after the structural test (using built-in scan) to detect a significant number of physical defects not covered by the LSA test set. This illustrates how system-level test can be reused to enhance the quality of a production test.