Parallel hardware implementation of handwritten character recognition system on wavefront array processor architecture

In this paper, we describe a parallel hardware implementation of handwritten character recognition system with neural network classifier on wavefront array processor (WAP) architecture. The WAP architecture needs no global clock for controlling the entire processors and each processing element can even be clocked differently. Thus, the clock skew becomes no longer problem and it is possible to construct massively parallel networks which are required for handwritten character recognition. We also present experimental results for the recognition of unconstrained handwritten numerals with the WAP architecture. The results were very impressive in view of real world application