DocumentCode :
3314332
Title :
Statistical analysis of particle/defect data experiments using Poisson and logistic regression
Author :
Ramírez, José G. ; Collica, Randall S. ; Cantell, Brenda S.
Author_Institution :
Digital Equipment Corp., Hudson, MA, USA
fYear :
1994
fDate :
17-19 Oct 1994
Firstpage :
230
Lastpage :
238
Abstract :
This paper deals with the analysis of particle or defect data collected on silicon wafers at specific points during the IC manufacturing process, where a designed experiment was planned. To determine which experimental factors and settings have an impact on contamination is of primary concern when making decisions for reducing defects during the IC manufacturing process. This paper shows how one can fit models to particle data by means of Poisson regression while taking into account chip level correlations and wafer-to-wafer variability. It is shown that when these factors are not taken into account, the model specified does not fit the data properly and the significance levels of the test statistics are smaller than they should be. This can lead to declaring factors significant when in fact they are not. We provide several examples of particle data on wafers and also airborne particle data obtained from a fabrication facility experiment aimed at decreasing the level of microcontaminants in the fabrication facility itself. Finally, we show how to classify these particle data into “killed die” and thus the analysis of independent factors can be performed with the use of an overdispersed logistic model. Practical analysis considerations are given to make the reader aware of the possible pitfalls one can fall into if nor considered. Future directions and limitations are discussed briefly
Keywords :
statistical analysis; IC manufacturing process; Poisson regression; Si wafers; airborne particle data; chip level correlations; contamination; defect data; fabrication facility experiment; logistic regression; microcontaminants; model; overdispersed logistic model; particle/defect data experiments; statistical analysis; wafer-to-wafer variability; Contamination; Fabrication; Logistics; Manufacturing processes; Performance analysis; Process design; Semiconductor device modeling; Silicon; Statistical analysis; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1994. Proceedings., The IEEE International Workshop on
Conference_Location :
Montreal, Que.
ISSN :
1550-5774
Print_ISBN :
0-8186-6307-3
Type :
conf
DOI :
10.1109/DFTVS.1994.630034
Filename :
630034
Link To Document :
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