Title :
Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates
Author_Institution :
Brno Univ. of Technol., Brno
Abstract :
This paper describes a new self-testing 1-bit full adder. This circuit consists of three polymorphic NAND/NOR gates, two XOR gates and two inverters. The adder is able to detect a reasonable number of stuck-at-faults without the need of any additional logic and diagnostic signals. A fault is indicated by oscillations at the carry-out output. Properties of n-bit carry-propagate adder which is composed of the proposed 1-bit self-testing adders are investigated.
Keywords :
adders; carry logic; fault diagnosis; logic design; logic gates; logic testing; oscillations; NAND gates; NOR gates; XOR gates; carry-out output oscillations; fault indication; inverters; n-bit carry-propagate adder properties; polymorphic gates; self-testing full adder design; stuck-at-fault detection; Adders; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Lighting control; Logic; Signal generators; Temperature control; Voltage control;
Conference_Titel :
Design and Diagnostics of Electronic Circuits and Systems, 2007. DDECS '07. IEEE
Conference_Location :
Krakow
Print_ISBN :
1-4244-1162-9
Electronic_ISBN :
1-4244-1162-9
DOI :
10.1109/DDECS.2007.4295290
