A low power 12-Bit ENOB SAR ADC for silicon drift X and gamma ray detector read-out

In this work a high-resolution, low power, successive approximation register (SAR) ADC for X and Gamma Ray Silicon Drift Detector read-out in space applications is presented. The proposed scheme, implemented at transistor level in 0.35 μm CMOS technology consists in an input buffer, a high resolution comparator, a logic control circuit and a capacitive DAC. Simulations carried out in worst case matching between the capacitance elements and by considering intra and inter-die variations show an effective number of bits equal to 11.97 and a SNDR of 73.8 dB. The simulated DNL performance is -0.1 ÷ +0.1 LSB while the INL is equal to -0.14 ÷ + 0.14. The mean power consumption is 0.27 mW while the ADC FoM is only 87 fJ/step.