Potential of Reconfigurable Digital Backend in UWB Receiver for Wireless Sensor Network

Wireless sensor networks (WSNs) open a new paradigm for extracting data from the environment and enable reliable monitoring/controlling for a large number of applications areas. They demand ultra low power consumption from the design components as they are battery operated. Various power reduction techniques and algorithms for the data acquisition block in WSN system are proposed in the literature. This paper presents the application of ultra wideband (UWB) communication technology for the transceiver block in a WSN. The present digital UWB radio architecture uses significant parallelism in the digital backend during synchronisation operation which increases power consumption of the entire system. This paper investigates the actual parallelism required for different channel impulses and time delays. This is done in order to estimate the potential for power saving that can be achieved by incorporating real time re configurability in digital backend of the UWB receiver. It is observed that reconfiguration has a potential of achieving an average relative power saving of 47%, for a typical operating condition. This is verified by power consumption results obtained for the FPGA implementation of pulse matched filter in the digital backend of a UWB receiver.