DocumentCode
3315898
Title
Reversible Synthesis with Minimum logic function
Author
Guan, Zhijin ; Qin, Xiaolin ; Ge, Ziming ; Zhang, Yiqing
Author_Institution
Coll. of Infomation Sci. & Tech., Nanjing Univ. of Aeronaut. & Astronaut.
Volume
2
fYear
2006
fDate
3-6 Nov. 2006
Firstpage
968
Lastpage
971
Abstract
A first practical logic function reversible synthesis method has been presented. In this method, minimizing a standard logic function for obtained a SOP of optimization in our approach previously. This efficient conversion between SOP and fixed polarity Reed-Muller (FPRM) forms. The results show that the algorithm is efficient in terms of time and space. We also proposed the synthesis algorithm for reversible functions. It uses fixed polarity Reed-Muller decomposition at each stage to synthesize the function as a network of Toffoli gates. Some examples of NCMC benchmarks with a large number of variables were presented to demonstrate the suitability of the algorithm for synthesizing complex functions
Keywords
circuit optimisation; logic design; logic gates; Toffoli gates; fixed polarity Reed-Muller decomposition; logic function; optimization; reversible synthesis; Biology computing; Boolean functions; Circuit synthesis; Educational institutions; Information science; Logic design; Logic functions; Network synthesis; Quantum computing; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Intelligence and Security, 2006 International Conference on
Conference_Location
Guangzhou
Print_ISBN
1-4244-0605-6
Electronic_ISBN
1-4244-0605-6
Type
conf
DOI
10.1109/ICCIAS.2006.295405
Filename
4076101
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