Title :
Solving the interconnect bottleneck. Optoelectronic FPGAs
Author :
Van Campenhout, J.M.
Author_Institution :
Dept. of Electron. & Inf. Syst., Ghent Univ., Belgium
Abstract :
The term smart-pixel architectures usually refers to systems that consist of optically connected electronic planes, having a regular two-dimensional structure, and in which the electronics form a high-performance array processing structure. We use the term smart-pixel interconnect to designate an optical interconnect that consists of a massive number of light sources or detectors placed on a two-dimensional grid, that interconnect to a similar array located on the surface of a neighboring chip. We do not imply any dedicated nature of the underlying electronics. Such smart-pixel interconnects are being considered as a possible way to solve or alleviate the rapidly worsening interconnect problems of VLSI.
Keywords :
VLSI; field programmable gate arrays; integrated optoelectronics; optical interconnections; smart pixels; VLSI; high-performance array processing structure; interconnect bottleneck; interconnect problems; light sources; neighboring chip; optical interconnect; optically connected electronic planes; optoelectronic FPGAs; regular two-dimensional structure; smart-pixel architectures; smart-pixel interconnect; smart-pixel interconnects; underlying electronics; Computer architecture; Delay; Face detection; Field programmable gate arrays; Integrated circuit interconnections; Optical arrays; Optical design; Optical interconnections; Very large scale integration; Wire;
Conference_Titel :
Broadband Optical Networks and Technologies: An Emerging Reality/Optical MEMS/Smart Pixels/Organic Optics and Optoelectronics. 1998 IEEE/LEOS Summer Topical Meetings
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-7803-4953-9
DOI :
10.1109/LEOSST.1998.690397