• DocumentCode
    3317169
  • Title

    Two Alternative Hardware Implementations for the M-ary Modular Exponentiation Pre-Processing

  • Author

    Nedjah, Nadia ; de Macedo Mourelle, Luiza

  • Author_Institution
    Dept. of de Electron. Eng. & Telecommun., State Univ. of Rio de Janeiro
  • Volume
    2
  • fYear
    2006
  • fDate
    3-6 Nov. 2006
  • Firstpage
    1283
  • Lastpage
    1286
  • Abstract
    In this paper, we propose two hardware implementations for computing modular exponentiations using the m-ary method. The main difference between these two implementations resides in the pre-processing step. During this step, the first implementation pre-computes all powers while the second computes only those that are necessary. However, the first implementation requires less hardware area than the second. We compare these two implementations using the performance factor, which takes into account both space and time requirements
  • Keywords
    digital arithmetic; digital arithmetic; hardware implementations; m-ary modular exponentiation pre-processing; Counting circuits; Hardware; Multiplexing; Partitioning algorithms; Power engineering and energy; Power engineering computing; Registers; Systems engineering and theory; TV interference; Telecommunication computing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Intelligence and Security, 2006 International Conference on
  • Conference_Location
    Guangzhou
  • Print_ISBN
    1-4244-0605-6
  • Electronic_ISBN
    1-4244-0605-6
  • Type

    conf

  • DOI
    10.1109/ICCIAS.2006.295263
  • Filename
    4076169