Instruction-set simulator design and realization based on the virtual instruction

Instruction-set simulator is very important method and technique in reverse engineering analysis, compiling optimization and code coverage testing. It provides the test platform for analyzing software and the accurate data for program comprehension. An instruction-set simulator is designed in this article, it can simulate various processor´s object program. This paper also provides a method to construct virtual instruction set, especially describes design memory simulating and instruction system simulating in the instruction-set simulator.