Title :
Integrating VHDL into a first course in logic design
Author_Institution :
Dept. of Comput. Sci., Malaspina Univ.-Coll, Nanaimo, BC, Canada
Abstract :
Present industry practice has created a high demand for systems designers with knowledge and experience in using hardware description languages. Many universities offer this type of training in advanced digital engineering courses. We describe our experience in integrating VHDL into a first course in logic design.
Keywords :
computer science education; educational courses; electronic engineering education; hardware description languages; VHDL; advanced digital engineering courses; computer science education; hardware description languages; logic design course; systems designers; training; universities; Assembly; Circuits; Computer architecture; Computer science; Laboratories; Logic design; Logic programming; Pins; Software engineering; System testing;
Conference_Titel :
Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Conference_Location :
Edmonton, Alberta, Canada
Print_ISBN :
0-7803-5579-2
DOI :
10.1109/CCECE.1999.804939
