DocumentCode :
3320996
Title :
Thermal design and reliability of convenable MultiChip Module package on HDIIVH substrates
Author :
Hsu, Hsiang-Chen ; Chen, Lih-Shnn ; Chu, Lee-Wei
Author_Institution :
Dept. of Mech. Eng., I-Shou Univ., Kaohsiung, Taiwan
fYear :
2002
fDate :
4-6 Dec. 2002
Firstpage :
422
Lastpage :
425
Abstract :
The thermal stress and mechanical behavior prediction for Convenable MultiChip Module (MCM) on High Density Interconnected Inner Via Holes (HDIIVH) multilayers substrate have been developed by using finite element simulation model. The model is initially created for the I/O redistribution as well as chip placement which includes chip attached layer, redistribution layer and the ball grid array layer. The newly developed hybrid integrated circuit and the HDIIVH multilayers substrate technology are proposed to implement the system. In order to maintain satisfactory reliability the thermal performance of the BGA/CSP convenable MCM must be accurately predicted during the design phase. In this paper, we also studied the thermal design methodology to find the placement of heat dissipating elements such that the greatest temperature of elements sensitive to the temperature is as low as possible. A placement scheme that includes the cooling consideration for MCMs´ designs is applied to study both routability and reliability issues. The effect of the CSP placement on the substrate routability will be considered in details. This model is then applied to study the effect of BGA geometry and HDIIVH multilayers substrate on the thermal-induced stresses. The infinite element scheme is also included in the thermal model to deal with unbounded thermal problem. After properly selected redistribution and chip placement, the numerical simulations of peak thermal stresses are realistically restricted for all number of solder bumps. Up to four chips were placed and simulated in this research. The thermal stress in solder joint is found to be the most crucial for the fracture of BGA package. The reduction of the thickness of substrate will result in the dramatically reduced in the system rigidity. The structure of the entire system becomes unstable when the thickness of substrate and the radius of bumps are reduced. The convergence of element was studied to maintain the accuracy of finite element model. Predicted thermal-induced strain was compared with existing two-dimensional experimental results. A series of comprehensive cases studies is performed to illustrate the influences of the pitch, dimensions and number of BGA bumps and inner via holes in the proposed model.
Keywords :
ball grid arrays; chip scale packaging; convergence of numerical methods; cooling; finite element analysis; hybrid integrated circuits; multichip modules; reliability; thermal management (packaging); thermal stresses; CSP/BGA package; HDIIVH multilayer substrate; I/O redistribution; chip placement; convenable multichip module package; convergence; cooling; finite element model; fracture; heat dissipation; hybrid integrated circuit; mechanical properties; numerical simulation; reliability; routability; solder bump; thermal design; thermal stress; Circuit simulation; Electronics packaging; Finite element methods; Hybrid integrated circuits; Integrated circuit interconnections; Multichip modules; Nonhomogeneous media; Predictive models; Temperature sensors; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Materials and Packaging, 2002. Proceedings of the 4th International Symposium on
Print_ISBN :
0-7803-7682-X
Type :
conf
DOI :
10.1109/EMAP.2002.1188876
Filename :
1188876
Link To Document :
بازگشت