Study of poles and zeros arrangement method for PID controller on TCSC

TCSC seems to be one of the members of FACTS family. It has many benefits in tackling power quality problems including the increase of power and transient stability as well as in the sub-synchronous resonance mitigation. However, these advantages are highly depending on the controller used. This paper deals with Proportional Integral Derivative (PID) controller which is attempted to correct the error between a measured process variable and a desired set point by calculating and gives correct action that adjusts the response to the voltage sag or fault. Voltage sag is one of the most common power quality problems facing by industrial and commercial loads nowadays. The PID controller has been utilized in single phase Thyristor Controlled Series Capacitor (TCSC) with the new poles and zeros arrangement on the PID controller to investigate the effects of fault (during and post-fault) at the transmission line as well as at the distribution loads. The results obtained have demonstrated that the proposed topology has effectively reduced the post fault effects on the distribution system.