DocumentCode :
3321919
Title :
Embodiment of compact and high performance HVIC process
Author :
Jeon, C.K. ; Kim, S.L. ; Kim, M.H. ; Kim, J.J.
Author_Institution :
Process Dev. Group, Fairchild Semicond., Kyonggi
fYear :
2005
fDate :
11-12 April 2005
Firstpage :
130
Lastpage :
133
Abstract :
A new, 700 V, HVIC (high voltage integrated circuits) process with compact size and high performance was developed . This process has a low sheet resistance of high side island by adopting EPI and n-type buried layer. It also has much smaller isolation width of 16 um than 150 um of conventional process, which makes it possible to integrate isolated devices into the high side island region
Keywords :
buried layers; integrated circuit manufacture; island structure; isolation technology; power integrated circuits; 700 V; EPI layer; high side island region; high voltage integrated circuits; isolated devices; n-type buried layer; sheet resistance; Circuit topology; Doping; Epitaxial layers; Frequency; Low voltage; MOSFET circuits; Power MOSFET; Silicon; Substrates; Switched-mode power supply;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 2005 IEEE/SEMI
Conference_Location :
Munich
Print_ISBN :
0-7803-8997-2
Type :
conf
DOI :
10.1109/ASMC.2005.1438781
Filename :
1438781
Link To Document :
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