Error-energy analysis of hardware logarithmic approximation methods for low power applications

This paper presents an overview of methods for combinational, base-two logarithmic approximation using Mitchell´s algorithm, piecewise-linear/quadratic error compensation schemes, and direct approximation. Optimization methods are used for computing linear segments for each compensation scheme including Hamming weight minimization and pattern recognition of segment slopes for multiplier-less error compensation. A novel, near-zero-average error quadratic compensation scheme is also presented. A test chip was fabricated in a commercial 130nm technology including fifteen base-two logarithm approximations and each was evaluated for its standalone accuracy, measured energy, delay, and area in order to determine the best classes of approximation for low-energy and high-accuracy operation. A system-level evaluation of these methods was performed using a software model of a keyword detection speech pipeline to predict the impact of inaccurate logarithmic approximation on the detection accuracy of keywords across various noise levels.