DocumentCode
3323988
Title
A wave digital filter three-port adaptor with fine grained pipelining
Author
Singh, Rajinder Jit ; McCanny, J.V.
Author_Institution
Dept. of Elect. & Electron. Eng., Queen´´s Univ. of Belfast, UK
fYear
1991
fDate
2-4 Sep 1991
Firstpage
116
Lastpage
128
Abstract
A VLSI architecture for implementing wave digital filter three-port adaptors is described. The design presented general one and can be used to construct RLC ladder filters. High sampling rates are obtained through a combination of fine grained pipelining and most significant bit first arithmetic. The resulting circuit is highly regular and for the most part consists of simple carry save adders
Keywords
VLSI; digital arithmetic; ladder networks; wave digital filters; RLC ladder filters; VLSI architecture; carry save adders; fine grained pipelining; most significant bit first arithmetic; sampling rates; wave digital filter three-port adaptor; Adders; Arithmetic; Circuit topology; Computer architecture; Digital filters; Frequency; Microelectronics; Pipeline processing; RLC circuits; Sampling methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Application Specific Array Processors, 1991. Proceedings of the International Conference on
Conference_Location
Barcelona
Print_ISBN
0-8186-9237-5
Type
conf
DOI
10.1109/ASAP.1991.238889
Filename
238889
Link To Document