DocumentCode
3326341
Title
Improved bus-shift coding for low-power I/O
Author
Alamgir, Mohammed ; Basith, Iftekhar Ibne ; Supon, Tareq ; Rashidzadeh, Rashid
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Windsor, Windsor, ON, Canada
fYear
2015
fDate
24-27 May 2015
Firstpage
2940
Lastpage
2943
Abstract
In low-power VLSI design good amount of power can be saved by using coding scheme such as Bus-Invert (BI). Such a coding scheme looks at successive words on a data bus and applies transformation to minimize the number of transitions. In this paper we propose Bus-Shift (BS) coding scheme that circularly shifts the data to minimize transitions. Power saving of BI is poor on average cases, and even that deteriorates with wider bus width. In comparison the proposed BS scheme performs better in both maximum and average cases. For wide bus the savings from BS gets slightly worse, but still performs better than BI. Simulation results show a saving margin of 14% in average cases for a 32 bit bus. Comparison is also made with Shift-Invert (SINV), another reported coding scheme. An implementation of BS in Cadence is presented.
Keywords
VLSI; encoding; low-power electronics; Cadence; bus-invert; data bus; improved bus-shift coding; low-power I/O; low-power VLSI design; power saving; shift-invert; successive words; word length 32 bit; Bismuth; Capacitance; Distributed databases; Encoding; Hamming distance; Probability distribution; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location
Lisbon
Type
conf
DOI
10.1109/ISCAS.2015.7169303
Filename
7169303
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