DocumentCode
332736
Title
Node sampling: a robust RTL power modeling approach
Author
Bogliolo, A. ; Benini, L.
Author_Institution
Dipt. di Elettronica Inf. e Sistemistica, Bologna Univ., Italy
fYear
1998
fDate
8-12 Nov. 1998
Firstpage
461
Lastpage
467
Abstract
We propose a robust RTL power modeling methodology for functional units. Our models are consistently accurate over a wide range of input statistics, they are automatically constructed and can provide pattern-by-pattern power estimates. An additional desirable feature of our modeling methodology is the capability of accounting for the impact of technology variations, library changes and synthesis tools. Our methodology is based on the concept of node sampling, as opposed to more traditional approaches based on input sampling. We analyze the theoretical properties of node sampling and we formally show that it is a statistically sound approach. The superior robustness of our method is due to its limited dependency on pattern based characterization.
Keywords
logic CAD; power electronics; statistical analysis; functional units; input statistics; library changes; node sampling; pattern-by-pattern power estimates; register transfer level; robust RTL power modeling approach; robust RTL power modeling methodology; robustness; statistically sound approach; synthesis tools; technology variations; Adders; Business; Computational modeling; Digital circuits; Finite impulse response filter; Libraries; Permission; Robustness; Sampling methods; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1998. ICCAD 98. Digest of Technical Papers. 1998 IEEE/ACM International Conference on
Conference_Location
San Jose, CA, USA
Print_ISBN
1-58113-008-2
Type
conf
DOI
10.1109/ICCAD.1998.144308
Filename
742945
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