DocumentCode
3328666
Title
Towards reducing “functional only” fails for the UltraSPARCTM microprocessors
Author
Kinra, Anjali
Author_Institution
Texas Instrum. Inc., Stafford, TX, USA
fYear
1999
fDate
1999
Firstpage
147
Lastpage
154
Abstract
A description of test coverage on the UltraSPARC family of devices is presented. Techniques developed with the intent to reduce “functional only” failures are discussed along with the resulting impact to the manufacturing process
Keywords
automatic test pattern generation; computer debugging; design for manufacture; design for testability; embedded systems; fault diagnosis; integrated circuit testing; logic testing; microprocessor chips; pipeline processing; RamTest array tests; UltraSPARC microprocessors; debug methods; embedded RAM arrays; fault coverage; full scan logic; internal scan diagnosis; reduced functional only fails; stuck-at-fault ATPG; test coverage; Automatic test pattern generation; CMOS technology; Clocks; Failure analysis; Instruments; Manufacturing processes; Microprocessors; Pattern analysis; Silicon; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1999. Proceedings. International
Conference_Location
Atlantic City, NJ
ISSN
1089-3539
Print_ISBN
0-7803-5753-1
Type
conf
DOI
10.1109/TEST.1999.805624
Filename
805624
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