Functional ATE can meet the challenges

Author

West, Burnell G.

Author_Institution

ATE Div., Schlumberger Technol., San Jose, CA, USA

fYear

1998

fDate

18-23 Oct 1998

Firstpage

1155

Abstract

The SIA Roadmap presents some challenges which focus our attention on the cost and performance of functional ATE. High cost and demanding test performance requirements have been perceived as potential barriers to semiconductor production for the last 15 years or more-and predictions of the “death of ATE as we know it” have been heard at least that long. With forecasts of $35 million for 5300 pin testers frightening fab line managers worldwide, these predictions seem even more justified now. But are they? An attempt is made to answer this question

Keywords

automatic test equipment; automatic test pattern generation; electronics industry; integrated circuit testing; ATE cost; ATE performance; SIA Roadmap; critical timing paths; debug requirement; functional ATE; pattern generation; performance measurement requirement; semiconductor industry; Clocks; Costs; Economic forecasting; Isolation technology; Measurement; Power generation; Production; Test pattern generators; Testing; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1998. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-5093-6

Type

conf

DOI

10.1109/TEST.1998.743354

Filename

743354

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=332890