DocumentCode
3330740
Title
Clustering based techniques for IDDQ testing
Author
Jandhyala, Sri ; Balachandran, Hari ; Jayasumana, Anura P.
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
fYear
1999
fDate
1999
Firstpage
730
Lastpage
737
Abstract
A new technique for evaluating IDDQ data using a clustering based approach is presented. While prevailing IDDQ test techniques rely on a fixed threshold or the current signature of an IC, the proposed technique relies on abnormalities of the IDDQ distribution of a device with respect to other devices in the test set. Results of applying this technique to data collected on a high volume graphics chip are described. Results are also compared to the conventional single threshold approach, and benefits of the new technique are presented
Keywords
current distribution; electric current measurement; fault diagnosis; integrated circuit testing; pattern clustering; statistical analysis; IDDQ distribution abnormalities; IDDQ testing; IC testing; Venn diagram; clustering based techniques; current signatures; data collection; high volume graphics chip; Current distribution; Current measurement; Graphics; Integrated circuit testing; Manufacturing processes; Process design; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1999. Proceedings. International
Conference_Location
Atlantic City, NJ
ISSN
1089-3539
Print_ISBN
0-7803-5753-1
Type
conf
DOI
10.1109/TEST.1999.805802
Filename
805802
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