Linearity testing issues of analog to digital converters

Author

Kuyel, Turker

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

1999

fDate

1999

Firstpage

747

Lastpage

756

Abstract

This paper is a detailed overview of the practical issues related to linearity testing of analog to digital converters. The focus is on the available technology and methods for ADC linearity testing, and the goal is to demonstrate the issues and problems affecting the test capability. Delta-Sigma DACs and LC filtered RF Frequency synthesizers are covered as linear sources for the ADCs. Histogram based ramp and sine wave methods are covered as linearity test techniques. Integral non-linearity (INL) plots from a 10-bit 20MSPS pipeline ADC are given to demonstrate the test problems and performance. This work attempts to close the gap between the general theory and actual implementation problems of linearity tests for high performance ADCs

Keywords

analogue-digital conversion; frequency synthesizers; integrated circuit testing; 20MSPS pipeline ADC; ADC linearity testing; LC filtered RF frequency synthesizers; analog to digital converters; delta-sigma DACs; high performance ADCs; histogram based ramp methods; implementation problems; integral nonlinearity plots; linearity testing issues; sine wave methods; Analog-digital conversion; CMOS technology; Clocks; Digital signal processing; Frequency conversion; Instruments; Linearity; Logic testing; Radio frequency; Timing jitter;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1999. Proceedings. International

Conference_Location

Atlantic City, NJ

ISSN

1089-3539

Print_ISBN

0-7803-5753-1

Type

conf

DOI

10.1109/TEST.1999.805804

Filename

805804