Sealing of porous low-k dielectrics during plasma etching with H2 plasma cleaning

Summary form only given. In order to reduce the RC time delay in integrated circuits, porous dielectric materials are used to lower the capacitance of the interconnect wiring insulation. Typical pore sizes are up to many nm with porosity of up to 50%. The low-k materials are typically SiOCH - silicon dioxide with carbon groups, principally CH₃, lining the pores. The pores are open to the surface and internally connected, and so can offer pathways for reactive species to enter into the porous network. Reactions which remove CH_X groups can increase the k value of the material. To maintain the low-& value of the dielectric, sealing of the surface pores is desired.