DocumentCode
3333156
Title
Integration of cooling devices in silicon technology
Author
Perret, C. ; Boussey, J. ; Schaeffer, Ch ; Coyaut, M.
Author_Institution
Lab. d´´Electrotech. de Grenoble, CNRS, St. Martin d´´Heres, France
Volume
3
fYear
1999
fDate
1999
Firstpage
1780
Abstract
A novel cooling device fully built in silicon technology is presented. The new concept developed in this work consists in micromachining the bottom side of the circuit wafer in order to embed heat sinking microchannels directly in the silicon material, as near as possible to the heat generation source. These microchannels are then sealed, by a direct wafer bonding procedure, with another silicon wafer where microchannels and inlet-outlet nozzles are micromachined too. Such a configuration presents the advantages to provide a significant reduction of the cooler overall dimensions, to reduce the number of involved materials and to be obtainable by a VLSI compatible technology. The first prototype has been designed to meet severe power dissipation constraints representative of high-power electronic devices (i.e. IGBT). Using an adequate thermal simulator with appropriate approximations, the optimum dimensions of the micro heat sink were found out. The realization procedure was then carried out in a clean room environment. First experimental characterization results obtained from the earlier prototypes has demonstrated that the thermal properties of this silicon-based cooling device are satisfactory and can be reasonably compared to those of commercially available copper micro heat sinking components
Keywords
cooling; elemental semiconductors; heat sinks; insulated gate bipolar transistors; micromachining; semiconductor device manufacture; semiconductor device packaging; silicon; wafer bonding; FEM; Flux 3D; IGBT; Si; VLSI compatible technology; clean room environment; cooling devices integration; direct wafer bonding procedure; heat generation source; heat sinking microchannels; inlet-outlet nozzles; micro heat sink; micromachining; optimum dimensions; power dissipation constraints; realization procedure; silicon material; silicon technology; silicon-based cooling device; thermal simulation; Circuits; Cooling; Heat sinks; Microchannel; Micromachining; Power dissipation; Prototypes; Silicon; Very large scale integration; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. Conference Record of the 1999 IEEE
Conference_Location
Phoenix, AZ
ISSN
0197-2618
Print_ISBN
0-7803-5589-X
Type
conf
DOI
10.1109/IAS.1999.805981
Filename
805981
Link To Document