Concurrent calculations on reconfigurable logic devices applied to the analisys of video images

This paper presents the design and implementation on FPGA devices of an algorithm for computing the similarity between neighbor photograms in a video sequence using luminance information. Making use of the well-known flexibility of reconfigurable logic devices, we have designed a hardware implementation of the algorithm used in video segmentation and indexation. The experimental work has established a tradeoff between concurrent sequential resources and functional blocks, in order to achieve maximum operation speed with minimum silicon area. In order to evaluate the efficiency of the designed system, we have compared the performance of the hardware solution with that of calculations done via software using general-purpose processors with and without the MMX extension.