Title :
A partial-polyphase VLSI architecture for very high speed CIC decimation filters
Author :
Gao, Yonghong ; Jia, Lihong ; Tenhunen, Mannu
Author_Institution :
Electron. Syst. Design Lab., R. Inst. of Technol., Stockholm, Sweden
Abstract :
A partial-polyphase architecture for CIC (Cascaded Integrator-Comb) decimation filters is proposed in this paper. Based on the partial-polyphase decomposition and parallel processing techniques, filters with the new proposed architecture can operate at much lower sampling rate and still achieve the same performance as Hogenauer´s CIC filters. With the partial-polyphase decomposition, complicated polyphase decompositions are avoided in the case of decimation ratio and filter order is high. The new architecture has advantages in high speed operation, low power consumption and low complexity for VLSI implementation. Design issues such as polyphase components, internal word length, built-in self-test scheme and layout design considerations have been discussed
Keywords :
CMOS digital integrated circuits; built-in self test; cascade networks; circuit complexity; comb filters; digital filters; integrated circuit layout; integrated circuit testing; low-power electronics; matrix decomposition; parallel processing; signal sampling; very high speed integrated circuits; CMOS process; VLSI implementation; built-in self-test scheme; cascaded integrator-comb decimation filters; decimation ratio; design issues; high speed operation; internal word length; layout design; low complexity; low power consumption; parallel processing techniques; partial-polyphase VLSI architecture; partial-polyphase decomposition; polyphase components; sampling rate; very high speed CIC decimation filters; Adders; Digital communication; Finite impulse response filter; Isolation technology; Parallel processing; Pipelines; Receivers; Sampling methods; Very large scale integration; Wideband;
Conference_Titel :
ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5632-2
DOI :
10.1109/ASIC.1999.806541