DocumentCode
3343471
Title
Merged CORDIC algorithm
Author
Wang, Shaoyun ; Swartzlander, Earl E., Jr.
Author_Institution
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Volume
3
fYear
1995
fDate
30 Apr-3 May 1995
Firstpage
1988
Abstract
The COordinate Rotation DIgital Computer (CORDIC) algorithm is an iterative procedure to evaluate various elementary functions. It usually consists of one scaling multiplication and n+1 elementary shift-add iterations in an n bit processor. These iterations can be paired off to form double iterations to lower the hardware complexity while the computational complexity stays the same. With this structure, the shifter size is reduced to ½(1+9/n+1). In this paper, we present this merged algorithm, its error analysis, and software simulation results
Keywords
computational complexity; digital arithmetic; error analysis; iterative methods; mathematics computing; computational complexity; coordinate rotation digital computer algorithm; error analysis; iterative procedure; merged CORDIC algorithm; n-bit processor; scaling multiplication; shift-add iterations; Computational complexity; Computational modeling; Equations; Hardware; Software algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
0-7803-2570-2
Type
conf
DOI
10.1109/ISCAS.1995.523811
Filename
523811
Link To Document