DocumentCode :
3343836
Title :
An efficient implementation algorithm of IIR filter based on CPLD
Author :
Yang, Yongming ; Yu, Xinghuo ; Zhang, Li
Author_Institution :
Chongqing Univ.
fYear :
2005
fDate :
14-17 Dec. 2005
Firstpage :
910
Lastpage :
915
Abstract :
In this paper, an efficient implementation algorithm of IIR filter is proposed based on complex programmable logic device (CPLD). As an example, an IIR notch filter is designed with very high speed integrated circuit hardware description language (VHDL) and real time implemented on ALTRA Corporation´s ACEX 1K series CPLD chip. The implemented IIR notch filter is tested and the result of the example from the proposed hardware implementation is also presented to show the effectiveness of the algorithm
Keywords :
IIR filters; hardware description languages; notch filters; programmable logic devices; ALTRA Corporation; CPLD; IIR notch filter; VHDL; complex programmable logic device; hardware implementation; very high speed integrated circuit hardware description language; Delay; Digital systems; Field programmable gate arrays; Hardware; IIR filters; Logic devices; Programmable logic arrays; Programmable logic devices; Signal processing algorithms; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Technology, 2005. ICIT 2005. IEEE International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
0-7803-9484-4
Type :
conf
DOI :
10.1109/ICIT.2005.1600765
Filename :
1600765
Link To Document :
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