DocumentCode
3344906
Title
Roundings in floating point arithmetic
Author
Yohe, J.M.
fYear
1972
fDate
15-16 May 1972
Firstpage
1
Lastpage
36
Abstract
In this paper we discuss directed roundings and indicate how hardware might be designed to produce proper upward-directed, downward-directed, and certain commonly used symmetric roundings. Algorithms for the four binary arithmetic operations and for rounding are presented, together with proofs of their correctness; appropriate formulas for a priori error analysis of these algorithms are presented. Some of the basic applications of directed roundings are surveyed.
Keywords
error analysis; floating point arithmetic; roundoff errors; a priori error analysis; binary arithmetic operations; directed roundings; floating point arithmetic; symmetric rounding; Computers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 1972 IEEE 2nd Symposium on
Conference_Location
New York, NY
Type
conf
DOI
10.1109/ARITH.1972.6153916
Filename
6153916
Link To Document