Optimum address pointer assignment for digital signal processors

Generating optimum data memory layouts and address pointer assignments for digital signal processors are hard combinatorial optimization problems. It is shown that for fixed memory layouts, and in contrast to traditional heuristic approaches, optimum address pointer assignments can be generated easily. The computational complexity depends exponentially on just the number of address pointers. The proposed technique is applied to a large benchmark suite. Experimental results for three address pointers show that optimum solutions can be generated in almost all cases (99.98%) within one second. Since a large number of address pointers may be intractable, an additional heuristic pruning technique with nearly optimum performance is proposed.