DocumentCode
3347069
Title
Binary tree search architecture for efficient implementation of round robin arbiters
Author
Savin, C.E. ; McSmythurs, T. ; Czilli, J.
Author_Institution
Cisco Syst., Kanata, Ont., Canada
Volume
5
fYear
2004
fDate
17-21 May 2004
Abstract
A new architecture for the implementation of round robin arbiters (RRAs) with one-hot encoded grant signals is introduced. The proposed architecture uses a binary tree search (BTS) mechanism in conjunction with a unit-weighted representation of the priority index. It is shown that the proposed BTS RRA architecture achieves very significant improvements in time-area complexity compared to the most efficient conventional RRA configuration to date.
Keywords
asynchronous circuits; computer networks; resource allocation; scheduling; telecommunication switching; tree searching; binary tree search architecture; computer networking devices; one-hot encoded grant signals; priority encoders; priority index; round robin arbiters; shared resources; switch-fabric scheduling; time-area complexity; Binary trees; DC generators; Logic; Round robin;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on
ISSN
1520-6149
Print_ISBN
0-7803-8484-9
Type
conf
DOI
10.1109/ICASSP.2004.1327115
Filename
1327115
Link To Document