A Design of Multiprotocol Asynchronous Serial Communication Based on M Module

This paper proposes a design of multi protocol asynchronous serial communication M module, which can be configured as 8-channel RS-232 or 4-channel RS-422/485, and each channel´s property including baud rate, character-bit, parity mode and stop-bit can be configured separatly through the software. FPGA is adopted as the development platform, using the Verilog HDL to design timing logic of Mbus interface, UART (universal asynchronous receiver transmitter) and control logic of transceiver. This module with multifunction and flexibility, applies to VME, VXI, PXI, LXi and other bus sys-tem. The paper gives the hardware design and driver functions interface. The experimental result indicates that the module works stably, meets the reliability, functional and general requirements.